Hua, M and Zhang, Z and Wei, J and Lei, J and Tang, G and Fu, K and Cai, Y and Zhang, B and Chen, KJ (2017) Integration of LPCVD-SiN<inf>x</inf> gate dielectric with recessed-gate E-mode GaN MIS-FETs: Toward high performance, high stability and long TDDB lifetime. In: UNSPECIFIED 10.4.1-10.4.4..
Full text not available from this repository.Abstract
By employing an interface protection technique to overcome the degradation of etched GaN surface in high-temperature process, highly reliable LPCVD-SiN gate dielectric was successfully integrated with recessed-gate structure to achieve high-performance enhancement-mode (V ∼ +2.37 V @ I = 100 μA/mm) GaN MIS-FETs with high stability and high reliability. The LPCVD-SiN /GaN MIS-FET delivers remarkable advantages in high Vth thermal stability, long time-dependent gate dielectric breakdown (TDDB) lifetime and low bias temperature instability (BTI). x th d x
Item Type: | Conference or Workshop Item (UNSPECIFIED) |
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Subjects: | UNSPECIFIED |
Divisions: | UNSPECIFIED |
Depositing User: | Cron Job |
Date Deposited: | 25 Jan 2021 20:04 |
Last Modified: | 10 Apr 2021 22:37 |
DOI: | 10.1109/IEDM.2016.7838388 |