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Semi-insulating layer for novel high voltage polysilicon thin film transistors

Clough, FJ and Chen, Y and Brown, AO and Sankara Narayanan, EM and Milne, WI (1995) Semi-insulating layer for novel high voltage polysilicon thin film transistors. Materials Research Society Symposium - Proceedings, 377. pp. 731-736. ISSN 0272-9172

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Abstract

This work describes the deposition and characterisation of semi-insulating oxygen-doped silicon films for the development of high voltage polycrystalline silicon (poly-Si) circuitry on glass. The performance of a novel poly-Si High Voltage Thin Film Transistor (HVTFT) structure, incorporating a layer of semi-insulating material, has been investigated using a two dimensional device simulator. The semi-insulating layer increases the operating voltage of the HVTFT structure by linearising the potential distribution in the device offset region. A glass compatible semi-insulating layer, suitable for HVTFT applications, has been deposited by the Plasma Enhanced Chemical Vapour Deposition (PECVD) technique from silane (SiH 4 ), nitrous oxide (N 2 O) and helium (He) gas mixtures. The as-deposited films are furnace annealed at 600°C which is the maximum process temperature. By varying the N 2 O/SiH 4 ratio the conductivity of the annealed films can be accurately controlled up to a maximum of around 10 -7 Ω -1 cm -1 . Helium dilution of the reactant gases improves both film uniformity and reproducibility. Raman analysis shows the as-deposited and annealed films to be completely amorphous. A model for the microstructure of these Semi-Insulating Amorphous Oxygen-Doped Silicon (SIAOS) films is proposed to explain the observed physical and electrical properties.

Item Type: Article
Subjects: UNSPECIFIED
Divisions: Div B > Solid State Electronics and Nanoscale Science
Depositing User: Cron Job
Date Deposited: 17 Jul 2017 19:04
Last Modified: 03 Aug 2017 03:21
DOI: