CUED Publications database

Analysis and design of the dual-gate inversion layer emitter transistor

Udugampola, NK and McMahon, RA and Amaratunga, GAJ (2005) Analysis and design of the dual-gate inversion layer emitter transistor. IEEE Transactions on Electron Devices, 52. pp. 99-105. ISSN 0018-9383

Full text not available from this repository.
Item Type: Article
Subjects: UNSPECIFIED
Divisions: Div B > Electronics, Power & Energy Conversion
Depositing User: Unnamed user with email sms67@cam.ac.uk
Date Deposited: 18 May 2016 18:38
Last Modified: 28 Jul 2016 03:20
DOI: 10.1109/TED.2004.841348