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The current sharing optimization of paralleled IGBTs in a power module tile using a PSpice frequency dependent impedance model

Azar, R and Udrea, F and Ng, WT and Dawson, F and Findlay, W and Waind, P (2008) The current sharing optimization of paralleled IGBTs in a power module tile using a PSpice frequency dependent impedance model. IEEE T POWER ELECTR, 23. pp. 206-217. ISSN 0885-8993

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Item Type: Article
Uncontrolled Keywords: frequency dependent impedance insulated gate bipolar transistor (IGBT) module PSpice sharing tile
Subjects: UNSPECIFIED
Divisions: UNSPECIFIED
Depositing User: Cron job
Date Deposited: 16 Jul 2015 13:06
Last Modified: 30 Aug 2015 03:26
DOI: 10.1109/TPEL.2007.909182