CUED Publications database

Theoretical and numerical investigation of SiC JFET and MOSFET at 6.5 kV

Mihaila, A and Udrea, F and Azar, R and Liang, J and Amaratunga, G and Rusu, A and Brezeanu, G (1999) Theoretical and numerical investigation of SiC JFET and MOSFET at 6.5 kV. Proceedings of the International Semiconductor Conference, CAS, 1. pp. 191-194.

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Abstract

This paper presents a preliminary theoretical and numerical investigation of 4H-SiC JFET and MOSFET at 6.5 kV. To improve the on-state/breakdown performance of the JFET, buried layers in conjunction with a highly doped buffer layer have been used. Trench technology has been employed for the MOSFET. The devices were simulated and optimized using MEDICI[I] simulator. From the comparison between the two devices, it turns out that the JFET offers a better on-state/breakdown trade-off, while the trench MOSFET has the advantage of MOS-control.

Item Type: Article
Subjects: UNSPECIFIED
Divisions: Div B > Electronics, Power & Energy Conversion
Depositing User: Cron Job
Date Deposited: 07 Mar 2014 12:09
Last Modified: 27 Nov 2014 19:23
DOI: