Shashi, P and Milne, WI and Robertson, J (2002) The use of C-V techniques to investigate instability mechanisms in M-I-S structures. Materials Research Society Symposium - Proceedings, 716. pp. 477-482. ISSN 0272-9172Full text not available from this repository.
In the field of flat panel displays, the current leading technology is the Active Matrix liquid Crystal Display; this uses a-Si:H based thin film transistors (TFTs) as the switching element in each pixel. However, under gate bias a-Si:H TFTs suffer from instability, as is evidenced by a shift in the gate threshold voltage. The shift in the gate threshold voltage is generally measured from the gate transfer characteristics, after subjecting the TFT to prolonged gate bias. However, a major drawback of this measurement method is that it cannot distinguish whether the shift is caused by the change in the midgap states in the a-Si:H channel or by charge trapping in the gate insulator. In view of this, we have developed a capacitance-voltage (C-V) method to measure the shift in threshold voltage. We employ Metal-Insulator-Semiconductor (MIS) structures to investigate the threshold voltage shift as they are simpler to fabricate than TFTs. We have investigated a large of number Metal/a-Si:H/Si3N4/Si+n structures using our C-V technique. From, the C-V data for the MIS structures, we have found that the relationship between the thermal energy and threshold voltage shift is similar to that reported by Wehrspohn et. al in a-Si:H TFTs (J Appl. Phys, 144, 87, 2000). The a-Si:H and Si3N4 layers were grown using the radio-frequency plasma-enhanced chemical vapour deposition technique.
|Divisions:||Div B > Solid State Electronics and Nanoscale Science|
|Depositing User:||Cron Job|
|Date Deposited:||18 May 2016 19:08|
|Last Modified:||25 Jul 2016 08:00|