Ling, K-V and Wu, BF and Maciejowski, J (2008) Embedded Model Predictive Control (MPC) using a FPGA. IFAC Proceedings Volumes (IFAC-PapersOnline), 17. ISSN 1474-6670Full text not available from this repository.
Model Predictive Control (MPC) is increasingly being proposed for application to miniaturized devices, fast and/or embedded systems. A major obstacle to this is its computation time requirement. Continuing our previous studies of implementing constrained MPC on Field Programmable Gate Arrays (FPGA), this paper begins to exploit the possibilities of parallel computation, with the aim of speeding up the MPC implementation. Simulation studies on a realistic example show that it is possible to implement constrained MPC on an FPGA chip with a 25MHz clock and achieve MPC implementation rates comparable to those achievable on a Pentium 3.0 GHz PC. Copyright © 2007 International Federation of Automatic Control All Rights Reserved.
|Uncontrolled Keywords:||Algorithms and software Constrained control Digital implementation|
|Divisions:||Div F > Control|
|Depositing User:||Cron Job|
|Date Deposited:||07 Mar 2014 12:34|
|Last Modified:||30 Nov 2014 23:45|