Zuo, D and Kelly, MJ (2012) Estimating and Enhancing the Yield of Tuneling SRAM Cells by Simulation. IEEE Electron Device Letters.Full text not available from this repository.
As a novel implementation of the static random access memory (SRAM), the tunneling SRAM (TSRAM) uses the negative differential resistance of tunnel diodes (TD’s) and potentially offers considerable improvements in both standby power dissipation and integration density compared to the conventional CMOS SRAM. TSRAM has not yet been realized with a useful bit capacity mainly because the level of uniformity required of the nanoscale TD’s has been demanding and difficult to achieve. In this letter, we propose a Monte Carlo approach for estimating the yield of TSRAM cells and show that by optimizing the cell’s external circuit parameters, we can relax the allowable tolerance of a key device parameter of a resonant-TD-(RTD) based cell by three times.
|Divisions:||Div B > Solid State Electronics and Nanoscale Science|
|Depositing User:||Cron Job|
|Date Deposited:||09 Dec 2016 17:37|
|Last Modified:||23 Mar 2017 08:35|