Lemieux, G and Alimadadi, M and Sheikhaei, S and Palmer, P and Mirabbasi, S (2008) SoC energy savings = reduce+reuse+recycle: A case study using a 660MHz DC-DC converter with integrated output filter. Canadian Conference on Electrical and Computer Engineering. pp. 947-950. ISSN 0840-7789Full text not available from this repository.
This paper advocates 'reduce, reuse, recycle' as a complete energy savings strategy. While reduction has been common to date, there is growing need to emphasize reuse and recycling as well. We design a DC-DC buck converter to demonstrate the 3 techniques: reduce with low-swing and zero voltage switching (ZVS), reuse with supply stacking, and recycle with regulated delivery of excess energy to the output load. The efficiency gained from these 3 techniques helps offset the loss of operating drivers at very high switching frequencies which are needed to move the output filter completely on-chip. A prototype was fabricated in 0.18μm CMOS, operates at 660MHz, and converts 2.2V to 0.75-1.0V at ∼50mA.1 © 2008 IEEE.
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|Date Deposited:||16 Jul 2015 14:10|
|Last Modified:||02 Aug 2015 02:49|