CUED Publications database

Experimentally validated three dimensional GCT wafer level simulations

Lophitis, N and Antoniou, M and Udrea, F and Nistor, I and Arnold, M and Wikström, T and Vobecky, J (2012) Experimentally validated three dimensional GCT wafer level simulations. In: UNSPECIFIED pp. 349-352..

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In this paper we present a wafer level three-dimensional simulation model of the Gate Commutated Thyristor (GCT) under inductive switching conditions. The simulations are validated by extensive experimental measurements. To the authors' knowledge such a complex simulation domain has not been used so far. This method allows the in depth study of large area devices such as GCTs, Gate Turn Off Thyristors (GTOs) and Phase Control Thyristors (PCTs). The model captures complex phenomena, such as current filamentation including subsequent failure, which allow us to predict the Maximum Controllable turn-off Current (MCC) and the Safe Operating Area (SOA) previously impossible using 2D distributed models. © 2012 IEEE.

Item Type: Conference or Workshop Item (UNSPECIFIED)
Divisions: Div B > Electronics, Power & Energy Conversion
Depositing User: Cron Job
Date Deposited: 17 Jul 2017 19:26
Last Modified: 22 May 2018 07:22