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Fabrication and characterization of silicon nanowire p-i-n MOS gated diode for use as p-type tunnel FET

Brouzet, V and Salem, B and Periwal, P and Rosaz, G and Baron, T and Bassani, F and Gentile, P and Ghibaudo, G (2015) Fabrication and characterization of silicon nanowire p-i-n MOS gated diode for use as p-type tunnel FET. Applied Physics A: Materials Science and Processing, 121. pp. 1285-1290. ISSN 0947-8396

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Abstract

© 2015, Springer-Verlag Berlin Heidelberg. In this paper, we present the fabrication and electrical characterization of a MOS gated diode based on axially doped silicon nanowire (NW) p-i-n junctions. These nanowires are grown by chemical vapour deposition (CVD) using the vapour–liquid–solid (VLS) mechanism. NWs have a length of about $$7\,\upmu \hbox {m}$$7μm with $$3\,\upmu \hbox {m}$$3μm of doped regions (p-type and n-type) and $$1\,\upmu \hbox {m}$$1μm of intrinsic region. The gate stack is composed of 15 nm of hafnium dioxide ($$\text {HfO}_{2}$$HfO2), 80 nm of nickel and 120 nm of alumi nium. At room temperature, $$I_{\text {on}} =-52\,\hbox {nA}/\upmu \hbox {m}\, (V_{\text {DS}}=-0.5\,\text {V}, V_{\text {GS}}=-4\,\text {V})$$Ion=-52nA/μm(VDS=-0.5V,VGS=-4V), and an $$I_{\text {on}}/I_{\text {off}}$$Ion/Ioff ratio of about $$10^{4}$$104 with a very low $$I_{\text {off}}$$Ioff current has been obtained. Electrical measurements are carried out between 90 and 390 K, and we show that the I on current is less temperature dependent below 250 K. We also observe that the ON current is increasing between 250 and 390 K. These transfer characteristics at low and high temperature confirm the tunnelling transport mechanisms in our devices.

Item Type: Article
Subjects: UNSPECIFIED
Divisions: Div B > Solid State Electronics and Nanoscale Science
Depositing User: Cron Job
Date Deposited: 17 Jul 2017 19:09
Last Modified: 21 Sep 2017 01:37
DOI: