CUED Publications database

Design optimization of thin-film transistors based on a metal-substrate-semiconductor architecture for high DC voltage sensing

Udatha, SR and Ruhela, A and Saravanavel, G and Yaswant, V and Singh, J and Sambandan, S (2016) Design optimization of thin-film transistors based on a metal-substrate-semiconductor architecture for high DC voltage sensing. IEEE Transactions on Electron Devices, 63. pp. 1696-1703. ISSN 0018-9383

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Abstract

© 2016 IEEE. We discuss the potential application of high dc voltage sensing using thin-film transistors (TFTs) on flexible substrates. High voltage sensing has potential applications for power transmission instrumentation. For this, we consider a gate metal-substrate-semiconductor architecture for TFTs. In this architecture, the flexible substrate not only provides mechanical support but also plays the role of the gate dielectric of the TFT. Hence, the thickness of the substrate needs to be optimized for maximizing transconductance, minimizing mechanical stress, and minimizing gate leakage currents. We discuss this optimization, and develop n-type and p-type organic TFTs using polyvinyldene fluoride as the substrate-gate insulator. Circuits are also realized to achieve level shifting, amplification, and high drain voltage operation.

Item Type: Article
Subjects: UNSPECIFIED
Divisions: Div B > Solid State Electronics and Nanoscale Science
Depositing User: Cron Job
Date Deposited: 17 Jul 2017 19:18
Last Modified: 05 Oct 2017 02:22
DOI: