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On the vertical leakage of GaN-on-Si lateral transistors and the effect of emission and trap-to-trap-tunneling through the AIN/Si barrier

Longobardi, G and Yang, S and Pagnano, D and Camuso, G and Udrea, F and Sun, J and Garg, R and Imam, M and Charles, A (2017) On the vertical leakage of GaN-on-Si lateral transistors and the effect of emission and trap-to-trap-tunneling through the AIN/Si barrier. Proceedings of the 29th International Symposium on Power Semiconductor Devices and ICs, ISPSD 2017. pp. 227-230.

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Abstract

© 2017 IEEJ. Vertical leakage in lateral GaN devices has a significant contribution to the overall off-state current at high blocking voltages and high temperatures. It could could lead to premature breakdown before avalanche or dielectric breakdown occur. This paper identifies via experimental results and TCAD simulations the main physical mechanisms responsible for the vertical leakage through the epi and transition layer structure: (i) silicon impact ionization, (ii) electron injection across the AIN nucleation layer/silicon interface, (ill) space charge limited current. In particular, the trap-to-trap model, accounting for the leakage current across the nucleation layer, was implemented showing to be dominant at lower voltages ( < 200V).

Item Type: Article
Uncontrolled Keywords: GaN HEMT, traps vertical leackage, SCLC
Subjects: UNSPECIFIED
Divisions: Div B > Electronics, Power & Energy Conversion
Depositing User: Cron Job
Date Deposited: 17 Jul 2017 19:05
Last Modified: 19 Sep 2017 01:33
DOI: